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ASIC Analog Tech Lead

Website Hire With Jarvis - Urszula Kozlowski

Jarvis has partnered with an exciting Semiconductor company based out in Canada! Well known for their developments in ultra-low power wireless communication solutions for IoT and other applications. They are making a huge segment of growth in the IoT market!

Actively expanding their team and looking to on board a Technical Lead of Analog ASIC Development! Here you’ll be responsible for coaching and mentoring the team, collaborate with other leads and managers to remove blockers and ensure smooth progress in an Agile Scrum environment. This role directly reports to the Director of ASIC.

Responsibilities

  • ASIC architects to define requirements for RF
  • Analog and baseband blocks based on the product
  • Design CMOS RF and analog blocks and produce technical documentation
  • Support testing and debugging through productization
  • Optimize designs for manufacturing efficiency with production teams

Qualifications

  • Master’s/PhD in Electrical Engineering
  • 10+ years managing ASIC, SoC, or Silicon Development, with significant hands-on experience.
  • Experience in Cadence or Synopsys analog design flow required.
  • Familiarity with silicon qualification/back-end processes expected.

Apply for job

To apply for this job email your details to apply.a4lpxa1h8chq@aptrack.co